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History
Nanoimprint lithography was first invented by Prof. Stephen Chou and his students[1]. Soon after its invention, a lot of researchers developed many different variations and implementations. At this point, nanoimprint lithography has been added to the International Technology Roadmap for Semiconductors (ITRS) for the 32 and 22 nm nodes.
Processes
There are many different types of nanoimprint lithography, but two of them are most important: thermoplastic nanoimprint lithography and photo nanoimprint lithography.
Thermoplastic nanoimprint lithography
Thermoplastic nanoimprint lithography (T-NIL) is the earliest nanoimprint lithography developed by Prof. Stephen Chou's group. In a standard T-NIL process, a thin layer of imprint resist (thermoplastic polymer) is spin coated onto the sample substrate. Then the mold, which has predefined topological patterns, is brought into contact with the sample and they are pressed together under certain pressure. When heated up above the glass transition temperature of the polymer, the pattern on the mold is pressed into the melt polymer film. After being cooled down, the mold is separated from the sample and the pattern resist is left on the substrate. A pattern transfer process (reactive ion etching, normally) can be used to transfer the pattern in the resist to the underneath substrate.[1]
Photo nanoimprint lithography
In photo nanoimprint lithography (P-NIL), a photo(UV) curable liquid resist is applied to the sample substrate and the mold is normally made of transparent material like fused silica. After the mold and the substrate are pressed together, the resist is cured in UV light and becomes solid. After mold separation, a similar pattern transfer process can be used to transfer the pattern in resist onto the underneath material. The use of a UV-transparent mold is difficult in a vacuum, because a vacuum chuck to hold the mold would not be possible.
Electrochemical nanoimprinting
Electrochemical nanoimprinting can be achieved using a stamp made from a superionic conductor such as silver sulfide [2]. When the stamp is contacted with metal, electrochemical etching can be carried out with an applied voltage. The electrochemical reaction generates metal ions which move from the original film into the stamp. Eventually all the metal is removed and the complementary stamp pattern is transferred to the remaining metal.
Schemes
Full wafer nanoimprint
In a full wafer nanoimprint scheme, all the patterns are contained in a single nanoimprint field and will be transferred in a single imprint step. This allows a high throughput and uniformity. An at least 8" diameter full-wafer nanoimprint with high fidelity is possible.
To ensure the pressure and pattern uniformities of full wafer nanoimprint processes and prolong the mold lifetime, a pressing method utilizing isotropic fluid pressure, named Air Cushion Press (ACP)[3] by its inventors, is developed and being used by commercial nanoimprint systems.
Step and repeat nanoimprint
Nanoimprint can be performed in a way similar to the step and repeat optical lithography. The imprint field (die) is typically much smaller than the full wafer nanoimprint field. The die is repeatedly imprinted to the substrate with certain step size. This scheme is good for nanoimprint mold creation. It is currently limited by the throughput, alignment and street width issues.
Applications
Nanoimprint lithography has been used to fabricate device for electrical, optical, photonic and biological applications. For electronics devices, NIL has been used to fabricate MOSFET, O-TFT, single electron memory. For optics and photonics, intensive study has been conducted in fabrication of subwavelength resonant grating filter, polarizers, waveplate, anti-reflective structures, integrated photonics circuit and plasmontic devices by NIL. sub-10 nm nanofluidic channels had been fabricated using NIL and used in DNA strenching experiment. Currently, NIL is used to shrink the size of biomolecular sorting device an order of magnitude smaller and more efficient.
Benefits
A key benefit of nanoimprint lithography is its sheer simplicity. The single greatest cost associated with chip fabrication is optical lithography tool used to print the circuit patterns. Optical lithography requires high powered excimer lasers and immense stacks of precision ground lens elements to achieve nanometer scale resolution. There is no need for complex optics or high-energy radiation sources with a nanoimprint tool. There is no need for finely tailored photoresists designed for both resolution and sensitivity at a given wavelength. The simplified requirements of the technology lead to its low cost.
Imprint lithography is inherently a three-dimensional patterning process. Imprint molds can be fabricated with multiple layers of topography stacked vertically. Resulting imprints replicate both layers with a single imprint step, which allows chip manufactures to reduce chip fabrication costs and improve product throughput. As mentioned above, the imprint material does not need to be finely tuned for high resolution and sensitivity. A broader range of materials with varying properties are available for use with imprint lithography. The increased material variability gives chemists the freedom to design new functional materials rather than sacrificial etch resistant polymers.[4] A functional material may be imprinted directly to form a layer in a chip with no need for pattern transfer into underlying materials. The successful implementation of a functional imprint material would result in significant cost reductions and increased throughput by eliminating many difficult chip fabrication processing steps.[5]
Concerns
The key concerns for nanoimprint lithography are overlay, defects, template patterning and template wear.
Overlay
The current overlay 3 sigma capability is 10 nm.[6] Overlay has a better chance with step-and-scan approaches as opposed to full-wafer imprint.
Defects
As with immersion lithography, defect control is expected to improve as the technology matures. Defects from the template with size below the post-imprint process bias can be eliminated. Other defects would require effective template cleaning and/or the use of intermediate polymer stamps. When vacuum is not used during the imprint process, air can get trapped, resulting in bubble defects.[7] This is because the imprint resist layer and the template or stamp features are not perfectly flat. There is an elevated risk when the intermediate or master stamp contains depressions (which are especially easy air traps), or when the imprint resist is dispensed as droplets just before imprinting, rather than pre-spun onto the substrate. Sufficient time must be allowed for the air to escape.[8]
Template patterning
The template patterning can currently be performed by electron beam lithography or focused ion beam patterning; however at the smallest resolution, the throughput is very slow. As a result, optical patterning tools will be more helpful if they have sufficient resolution. Optical patterning tools are already in use for the manufacturing of photomasks. Other patterning techniques (including even double patterning) may also be used.
Template wear
The use of substantial pressure to not only contact but also penetrate a layer during imprinting accelerates the wear of imprint templates compared to other types of lithographic masks.
Other
Future applications of nanoimprint lithography may involve the use of porous low-k materials. These materials are not stiff and, as part of the substrate, are readily damaged mechanically by the pressure of the imprint process.
Removal of residual layers
A key characteristic of nanoimprint lithography (except for electrochemical nanoimprinting) is the residual layer following the imprint process. It is preferable to have thick enough residual layers to support alignment and throughput and low defects.[9] However, this renders the nanoimprint lithography step less critical for critical dimension (CD) control than the etch step used to remove the residual layer. Hence, it is important to consider the residual layer removal an integrated part of the overall nanoimprint patterning process.[10] In a sense, the residual layer etch is similar to the develop process in conventional lithography. It has been proposed to combine photolithography and nanoimprint lithography techniques in one step in order to eliminate the residual layer.[11]
Proximity effects
Nanoimprint lithography relies on displacing polymer. This could lead to systematic effects over long distances. For example, a large, dense array of protrusions will displace significantly more polymer than an isolated protrusion. Depending on the distance of this isolated protrusion from the array, the isolated feature may not imprint correctly due to polymer displacement and thickening. Resist holes can form in between groups of protrusions.[12] Likewise, wider depressions in the template do not fill up with as much polymer as narrower depressions, resulting in misshapen wide lines. In addition, a depression at the edge of a large array fills up much earlier than one located in the center of the array, resulting in within-array uniformity issues.
3D-patterning
A unique benefit of nanoimprint lithography is the ability to pattern 3D structures, such as damascene interconnects and T-gates, in fewer steps than required for conventional lithography. This is achieved by building the T-shape into the protrusion on the template.[13]
The future of nanoimprint
Nanoimprint lithography is a simple pattern transfer process that is neither limited by diffraction nor scattering effects nor secondary electrons, and does not require any sophisticated radiation chemistry. It is also a potentially simple and inexpensive technique. However, a lingering barrier to nanometer-scale patterning is the current reliance on other lithography techniques to generate the template. It is possible that self-assembled structures will provide the ultimate solution for templates of periodic patterns at scales of 10 nm and less.[14] It is also possible to resolve the template generation issue by using a programmable template[15] in a scheme based on double patterning.
As of October 2007, Toshiba is the only company to have validated nanoimprint lithography for 22 nm and beyond.[16] What is more significant is that nanoimprint lithography is the first sub-30 nm lithography to be validated by an industrial user.
References
- ^ a b Chou, S.Y.; Krauss, P.R.; Renstrom, P.J. (1996). "Imprint Lithography with 25-Nanometer Resolution". Science 272 (5258): 85–7. doi:.
- ^ Hsu, K.H.; Schultz, P.L.; Ferreira, P.M.; Fang, N.X. (2007). "Electrochemical Nanoimprinting with Solid-State Superionic Stamps". Nano Lett 7 (2): 446–451. doi:.
- ^ Gao H, Tan H, Zhang W, Morton K, Chou SY (November 2006). "Air cushion press for excellent uniformity, high yield, and fast nanoimprint across a 100 mm field". Nano Lett. 6 (11): 2438–41. doi:. PMID 17090070.
- ^ Hao, Jianjun; Palmieri, Frank; Stewart, Michael D.; Nishimura, Yukio; Chao, Huang-Lin; Collins, Austin; Willson, C. Grant. Octa(hydridotetramethyldisiloxanyl) silsesquioxane as a synthetic template for patternable dielectric materials. Polymer Preprints (American Chemical Society, Division of Polymer Chemistry) (2006), 47(2), 1158-1159.
- ^ Palmieri, Frank; Stewart, Michael D.; Wetzel, Jeff; Hao, Jianjun; Nishimura, Yukio; Jen, Kane; Flannery, Colm; Li, Bin; Chao, Huang-Lin; Young, Soo; Kim, Woon C.; Ho, Paul S.; Willson, C. G. Multi-level step and flash imprint lithography for direct patterning of dielectrics. Proceedings of SPIE-The International Society for Optical Engineering (2006), 6151
- ^ "Imprio 250 Nano-Imprint Lithography Systems". Retrieved on 2008-04-24.
- ^ H. Hiroshima and M. Komuro, Jpn. J. Appl. Phys. 46, pp. 6391-6394 (2007).
- ^ X. Liang et al., Nanotechnology 18, 025303 (2007).
- ^ S.V. Sreenivasan, Ian McMackin, Frank Xu, David Wang, Nick Stacey, Doug Resnick (2005). "Enhanced nanoimprint process for advanced lithography applications". Semiconductor Fabtech (25th edition).
- ^ Ph.D Thesis "Development of Nanoimprint Lithography for Applications in Electronics, Photonics and Life-sciences" by Patrick Carlberg from Lund University, Sweden
- ^ Cheng, X.; Jay Guo, L. (2004). "A combined-nanoimprint-and-photolithography patterning technique". Microelectronic Engineering 71 (3-4): 277–282. doi:.
- ^ S. Landis et al., Nanotechnology 17, 2701-2709 (2006).
- ^ Li, M.; Chen, L.; Chou, S.Y. (May 2001). "Direct three-dimensional patterning using nanoimprint lithography". Applied Physics Letters 78: 3322–4. doi:.
- ^ Shevchenko, E.V.; Talapin, D.V.; Kotov, N.A.; O’brien, S.; Murray, C.B. (2006). "Structural diversity in binary nanoparticle superlattices". Nature 439 (7072): 55–59. doi:.
- ^ US patent 7128559
- ^ M. LaPedus, "Toshiba claims to 'validate' nanoimprint litho," EETimes, October 16, 2007.
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